Octopus
hardware.F90
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1!! Copyright (C) 2008 X. Andrade, 2024. A Buccheri.
2!!
3!! This program is free software; you can redistribute it and/or modify
4!! it under the terms of the GNU General Public License as published by
5!! the Free Software Foundation; either version 2, or (at your option)
6!! any later version.
7!!
8!! This program is distributed in the hope that it will be useful,
9!! but WITHOUT ANY WARRANTY; without even the implied warranty of
10!! MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11!! GNU General Public License for more details.
12!!
13!! You should have received a copy of the GNU General Public License
14!! along with this program; if not, write to the Free Software
15!! Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
16!! 02110-1301, USA.
17!!
18module hardware_oct_m
19
20 implicit none
21 private
22 public :: &
26
28 type cache_t
29 integer :: size
30 integer :: line_size
31 end type cache_t
32
33 interface cache_t
34 module procedure cache_t_init
35 end interface cache_t
38 type hardware_t
39 type(cache_t) :: l1
40 type(cache_t) :: l2
41 integer :: dblock_size
42 integer :: zblock_size
43 contains
44 procedure :: init => hardware_init
45 end type hardware_t
47 ! Same as getting sizeof(a)
49 integer, public, parameter :: sizeof_real64 = 8
52 integer, public, parameter :: sizeof_complex64 = 16
53
56
58 type(cache_t), public :: default_l1
59 type(cache_t), public :: default_l2
60
61contains
62
64 function cache_t_init(data_size, line_size) result(cache)
65 type(cache_t) :: cache
66 integer, intent(in) :: data_size
67 integer, intent(in) :: line_size
68
69 cache%size = data_size
70 cache%line_size = line_size
71
72 end function cache_t_init
73
74
75 ! TODO(Alex) Issue 1013. Change hardware class to a free function, and make cache_t instance global.
83 subroutine hardware_init(this, l1_cache, l2_cache)
84 class(hardware_t), intent(inout) :: this
85 type(cache_t), intent(in) :: l1_cache
86 type(cache_t), intent(in) :: l2_cache
87
88 integer, parameter :: cpu_default_states_per_block = 4
90 this%l1 = l1_cache
91 this%l2 = l2_cache
92
93 this%dblock_size = this%l1%size / (cpu_default_states_per_block * sizeof_real64)
94 this%dblock_size = this%dblock_size - mod(this%dblock_size, this%l1%line_size) - 2*this%l1%line_size
95
96 this%zblock_size = this%l1%size / (cpu_default_states_per_block * sizeof_complex64)
97 this%zblock_size = this%zblock_size - mod(this%zblock_size, this%l1%line_size) - 2*this%l1%line_size
98
99 end subroutine hardware_init
100
101
102end module hardware_oct_m
103
104!! Local Variables:
105!! mode: f90
106!! coding: utf-8
107!! End:
subroutine hardware_init(this, l1_cache, l2_cache)
Initialise hardware object.
Definition: hardware.F90:90
type(hardware_t), public cpu_hardware
Global instance of CPU hardware specification.
Definition: hardware.F90:61
integer, parameter, public sizeof_real64
Number of bytes to store a variable of type real(real64)
Definition: hardware.F90:55
type(cache_t), public default_l2
Definition: hardware.F90:65
type(cache_t) function cache_t_init(data_size, line_size)
Initialise cache object.
Definition: hardware.F90:71
integer, parameter, public sizeof_complex64
Number of bytes to store a variable of type complex(real64)
Definition: hardware.F90:58
type(cache_t), public default_l1
Defaults covers common chip specification for (l1, l2) cache.
Definition: hardware.F90:64
Block-size optimisation for L1 cache size.
Definition: hardware.F90:44